PORTA_SINGLE_CTL=Val_0x0, GPIO_ID=Val_0x0, HW_PORTA=Val_0x0, NUM_PORTS=Val_0x0
Module Configuration Register 1
| APB_DATA_WIDTH | The value of this field defines the APB data width. 2 (Val_0x2): APB data width is 32 bits |
| NUM_PORTS | The value of this field defines the number of ports. 0 (Val_0x0): Number of ports is 1 |
| PORTA_SINGLE_CTL | The value of this bit defines the Port A single source configuration. 0 (Val_0x0): Port A is controlled from a two sources - LPGPIO 1 (Val_0x1): Port A is controlled from a single source - GPIOs |
| PORTB_SINGLE_CTL | Reserved for multi-port configuration |
| PORTC_SINGLE_CTL | Reserved for multi-port configuration |
| PORTD_SINGLE_CTL | Reserved for multi-port configuration |
| HW_PORTA | The value of this bit defines the Port A hardware configuration. 0 (Val_0x0): Port A has no external auxiliary hardware signals - GPIOs 1 (Val_0x1): Port A has external auxiliary hardware signals - LPGPIO |
| HW_PORTB | Reserved for multi-port configuration |
| HW_PORTC | Reserved for multi-port configuration |
| HW_PORTD | Reserved for multi-port configuration |
| PORTA_INTR | The value of this bit defines the Port A interrupts configuration. 1 (Val_0x1): PORT A is required to be used as an interrupt |
| DEBOUNCE | The value of this bit defines the debounce capability. 1 (Val_0x1): Included debounce capability |
| ADD_ENCODED_PARAMS | The value of this bit defines the encoded parameters. 1 (Val_0x1): Encoded parameters added |
| GPIO_ID | The value of this bit defines the GPIO ID. 0 (Val_0x0): GPIO_ID not included |
| ENCODED_ID_WIDTH | The value of this field defines the encoded ID width. |
| INTERRUPT_BOTH_EDGE_TYPE | The value of this bit defines the interrupt generation type. 1 (Val_0x1): Interrupt generation on both rising and falling edge |